RESUMO
Mechanical manipulation of nanowires (NWs) for their integration in electronics is still problematic because of their reduced dimensions, risking to produce mechanical damage to the NW structure and electronic properties during the assembly process. In this regard, contactless NW manipulation based methods using non-uniform electric fields, like dielectrophoresis (DEP) are usually much softer than mechanical methods, offering a less destructive alternative for integrating nanostructures in electronic devices. Here, we report a feasible and reproducible dielectrophoretic method to assemble single GaAs NWs (with radius 35-50 nm, and lengths 3-5 µm) on conductive electrodes layout with assembly yields above 90% per site, and alignment yields of 95%. The electrical characteristics of the dielectrophoretic contact formed between a GaAs NW and conductive electrodes have been measured, observing Schottky barrier like contacts. Our results also show the fast fabrication of diodes with rectifying characteristics due to the formation of a low-resistance contact between the Ga catalytic droplet at the tip of the NW when using Al doped ZnO as electrode. The current-voltage characteristics of a single Ga-terminated GaAs NW measured in dark and under illumination exhibit a strong sensitivity to visible light under forward bias conditions (around two orders of magnitude), mainly produced by a change on the series resistance of the device.
RESUMO
The successful synthesis of high crystalline quality and high aspect ratio GaAs nanowires (NWs) with a uniform diameter is needed to develop advanced applications beyond the limits established by thin film and bulk material properties. Vertically aligned GaAs NWs have been extensively grown by Ga-assisted vapor-liquid-solid (VLS) mechanism on Si(111) substrates, and they have been used as building blocks in photovoltaics, optoelectronics, electronics, and so forth. However, the nucleation of parasitic species such as traces and nanocrystals on the Si substrate surface during the NW growth could affect significantly the controlled nucleation of those NWs, and therefore the resulting performance of NW-based devices. Preventing the nucleation of parasitic species on the Si substrate is a matter of interest, because they could act as traps for gaseous precursors and/or chemical elements during VLS growth, drastically reducing the maximum length of grown NWs, affecting their morphology and structure, and reducing the NW density along the Si substrate surface. This work presents a novel and easy to develop growth method (i.e., without using advanced nanolithography techniques) to prevent the nucleation of parasitic species, while preserving the quality of GaAs NWs even for long duration growths. GaAs NWs are grown by Ga-assisted chemical beam epitaxy on oxidized Si(111) substrates using triethylgallium and tertiarybutylarsine precursors by a two-step-based growth method presented here; this method includes a growth interruption for an oxidation on air between both steps of growth, reducing the nucleation of parasitic crystals on the thicker SiO x capping layer during the second and longer growth step. VLS conditions are preserved overtime, resulting in a stable NW growth rate of around 6 µm/h for growth times up to 1 h. Resulting GaAs NWs have a high aspect ratio of 85 and average radius of 35 nm. We also report on the existence of characteristic reflection high-energy electron diffraction patterns associated with the epitaxial growth of GaAs NWs on Si(111) substrates, which have been analyzed and compared to the morphological characterization of GaAs NWs grown for different times under different conditions.
